1. Technical Field
The technical field relates to a transmitter apparatus, a receiver apparatus and a serial transmission system, and relates, in particular, to conduct an efficient data encoding and decoding system, multi-valuing, channel reduction, channel changeover, and performing transmission speed suppression when AV data dominated particularly by 24-bit data, 36-bit data and the like is transmitted.
2. Description of the Related Art
In recent years, video data have been made to have higher bits and higher resolutions with improved video picture qualities, and the amount of data to be transmitted by digital interfaces have also been increased. Regarding the bit count of AV data, 8-bit, 16-bit, 24-bit, 32-bit, 36-bit and 48-bit formats per pixel are provided also under the influence of the bit count in the computer and communication fields that are evolving by the exponentiation of two (2, 4, 8, 16, 32, 64, 128, . . . ) Among others, the 24-bit, 36-bit and 48-bit formats are currently dominant, and particularly beneficial in the consumer market are the 24-bit and 36-bit formats.
In the case of HDMI representative of AV digital interfaces, 24-bit video data of eight bits of RGB are fundamentally handled, and 36-bit and 48-bit data can be handled by HDMI1.3 and subsequent versions. Moreover, the resolution of the video format has been also developed, and in accordance with it, the formats that can be handled by HDMI, which have initially been only the 720p HD format and the 1080p full HD format, currently include also transmission in the 4K2K format and the 3D full HD format. In the future, it is demanded to further increase the speed so that transmission in the 3D 4K2K format and the 8K4K format can be achieved.
As an HDMI high-speed transmission technology, high-speed serial transmission is performed by using transmission lines of three channels, and based on processing in 8-bit units under the influence of the architectures of the computer and communication fields, transmission and reception of a total of 24 bits are fundamentally performed by performing TMDS encoding and decoding, or one kind of 8B10B conversion to convert 8-bit parallel data with a DC balance guarantee for each channel into 10 bits. Moreover, it is possible to handle 36-bit data by HDMI1.3 and subsequent versions, forcibly supporting 36 bits by the method of expanding the architecture of 24 bits, increasing the data speed by 1.5 times, and making 24 bits by separating the higher-order bits and the lower-order bits of 36-bit data. Moreover, regarding the data efficiency of HDMI, the effective rate is 80% of the transfer rate since the 8B10B coding is used regardless of the transmission bit count, and the efficiency is deteriorated although data of 20% is utilized for clock regeneration and synchronization.
Considering transmission in the 8K4K format and the like in the future, beneficial technologies are improvements in the data efficiency by reviewing the encoding and decoding system, reductions in the number of channels by multi-valuing or the like, suppression of the transmission speed, simple changeover of channels in accordance with the data bit count, and so on.
Conventionally, the serial transmission system described in a Patent Document 1 of Japanese patent laid-open publication No. JP 2003-204363 A, the 64B66B encoding and decoding system generalized in the communication field and the like can be enumerated as methods for improving the data efficiency. However, the methods have low affinities with the AV data dominated by 24-bit data and 36-bit data, and data processing, such as bit relocation, becomes complicated. Moreover, the 64B66B encoding and decoding system, which is the encoding and decoding system using scrambling, has disadvantages of difficulties in achieving clock regeneration and synchronization because of a large variation in the DC balance and a long bit length.
However, the aforementioned conventional configuration, which handles 8-bit and 64-bit processing units, has had the problems of low affinities with them in handling AV data dominated by 24-bit, 36-bit and 48-bit data, and complicated data processing. Moreover, the configuration has had another problem about how to manage an encoding and decoding system that guarantees a DC balance suitable for the speed increase and can easily be increased in speed also with easy clock regeneration and synchronization.